basic logic gates lab report discussion

Throughout this experiment, and throughout the entire course, you may wish to capture images of the oscilloscope display to help you analyze signals and to include in your lab reports. for this example. We will be expanding on our knowledge and making more complicated, functions. Students should become familiar with these characteristics. If you wish to confirm your prediction, repeat step 6 for the NOR gate. The truth table The NAND gate is a universal gate because it can be used to produce the NOT operation, the AND operation, the OR operation, and the NOR operation. Course Hero is not sponsored or endorsed by any college or university.

3-2) Draw the reconstructed circuit and logic diagram here (only NAND gates), 3-3) Built the truth table for the reconstructed circuit and measured the voltage for each input/output, Table 5-2 Truth table and volts measured for input/output for the reconstructed circuit. a. 0000019433 00000 n HlSMs0+dI|Y#39D77e#q_xXZxjC\+|_ZsA\;,@pH $RLeJ&|~KGg5dBj^H`NLs%)#{,,t-FdV_6- N _rels/.rels ( j0@QN/c[ILj]aGzsFu]U ^[x 1xpf#I)Y*Di")c$qU~31jH[{=E~

What do you observe? Fig. The signals passing through a gate take a certain amount of time to propagate from its inputs to the output. 0000001929 00000 n hbbd``b`$Zc(`{ Familiarization with the breadboard 2. 2). Figure F1: Implementation of XOR and XNOR using NAND gates, Table 01: Truth table of the given circuit using universal gates, A B C I 1 = AC I 2 = BC F = I 1 + I 2 ;F//lC_*FY =j1/$*]gBm=Lt7'VU6UV>>G_"* t?^,why+_b^OCjp5*.f ] vWMq3^JbMnq:NZ;S We ran, the simulation and analyzed the results to make sure our adder has proper functionality. 0000006036 00000 n Figure 5-4 Logic Circuit for part 1 . xbba`b``3 1` U There are various commercial integrated circuit chips available. followed by an inverter not the other way around. Implement the basic logic gates using universal gates Both input and output signals are not ideal signals, i.e. You can see from Fig. Here you will see the three different inputs and two different outputs.

Try it. AND, NAND, OR, and NOR representing DeMorgans theorems can be obtained.

As those statements will play a major role in, comprehending advanced programming languages such as C++ and Javasccript. The former has a wide operating-temperature range, suitable for military use, and the latter has a narrower temperature range, suitable for industrial use. endstream endobj 190 0 obj <>/Metadata 23 0 R/PageLayout/OneColumn/Pages 187 0 R/StructTreeRoot 46 0 R/Type/Catalog>> endobj 191 0 obj <>/Font<>>>/Rotate 0/StructParents 0/Type/Page>> endobj 192 0 obj <>stream These basic logic gates can be implemented with SSI integrated circuits (ICs) or as part of more complex MSI or VLSI circuits. WebIC diagram from the circuit in Figure F3 Step 2 in Lab Manual Discussion: During doing my lab report and my lab class I faced couple of problem .I mistake There were too many input and output so I got confused and at the end it took me endstream endobj 520 0 obj<>/OCGs[524 0 R]>>/PieceInfo<>>>/LastModified(D:20080418223301)/MarkInfo<>>> endobj 522 0 obj[523 0 R] endobj 523 0 obj<>>> endobj 524 0 obj<>/PageElement<>>>>> endobj 525 0 obj<>/ProcSet[/PDF/Text]/ExtGState<>/Properties<>>>/StructParents 0>> endobj 526 0 obj<> endobj 527 0 obj<> endobj 528 0 obj<> endobj 529 0 obj<> endobj 530 0 obj<> endobj 531 0 obj<> endobj 532 0 obj<> endobj 533 0 obj<> endobj 534 0 obj<> endobj 535 0 obj<>stream TTL and ECL are based upon bipolar transistors. MOS and CMOS, are based on field effect transistors. 0000002362 00000 n

Why are NAND gates and NOR gates sometimes referred to as. A Logic Probe is a piece of test equipment which displays the logic level at a point in the circuit. Use one of the transmission gates in a 4066, and connect a 50Hz unipolar input (0V5V) to its control pin and a bipolar 1KHz square wave to its input pin. Include Boolean algebra, truth tables, and logic diagrams for the circuit reconstructed with only NAND gates. ECE 394 Lab 1: Logic Gates and Logic Families - New Jersey However, this is not a required step for this lab. 0T\N-U9xgsb&. Now we will look at the operation of each. These logic gates perform the basic Boolean functions, such as AND, OR, NAND, NOR, Inversion, Exclusive-OR, Exclusive-NOR. Understand gate level minimization. 0000002272 00000 n A 3) Reconstruct the circuit above using only NAND gates. %PDF-1.5 % Use one of the CMOS NAND gates in a 4011 to verify its function and measure its propagation delay for both the rising edge and the falling edge using the same method as in the inverter experiment. 1 0 0 0 0 0, IC diagram from the circuit in Figure F3 Step 2 in Lab Manual, Answer to Question No. All other logic functions can be derived from these three. Table 5-4 Truth table and volts measured for input/output for the reconstructed circuit. Power dissipation is an important parameter. %PDF-1.4 % 0000012195 00000 n This interval of time is defined as the propagation delay of the gate. 2. The lab consists, of 4 problems that will be completed on tinkercad.com. AK^[#b trailer

Implement Boolean functions using universal gates Our goal is to make the OpenLab accessible for all users. Each logic gate implements a logic function such as the NOT (also known as the inverter), the AND, the OR and the 0000001205 00000 n 0000011943 00000 n Fan-outspecifies the number of standard loads that the output of a gate can drive without impairing its normal operation. I.e. Generally speaking, an IC with four gates will require, from its power supply, four times the power dissipated in each gate. Lab Report: Digital Logic Figure 9 Results Discussion and Conclusions The results show that the Arithmetic Logic Unit behaved as expected. The small circle on the output of the circuit symbols designates the logic complement. 0000003198 00000 n if VDD = 5V, its noise margin is 2V). manufacturers only need to produce 1 type of universal gate to be able to use all other gates Part E : Universalityof NAND and NOR Gates Objectives: To demonstrate the operation and characteristics of NAND and NOR gates and to show how any of these gates can be used to perform any of the three basic logic functions. o7qwztie|I7RHEPf?)FUp`k>a;|. Then it shows, in the instruction we have to create a 3 input XOR gate. The Cin input will be the carryout bit. universal gate is a gate which can implement any Boolean function without need to use any other WebDraw the logic diagram of the network and verify its operation using a truth table. WebPart 1. In order for an OR Gate to make the circuit work, it at least needs one of the inputs to have a 1 value hence You will need to build a program that provides retirement estimates based on user inputs. Table 5-1 Truth table and volts measured for input/output for Figure 5-4. There are two types of noise to be considered. A logic design that implements a full adder is shown below in Figure 1. WebLab 2 6 4. Universal gates are gates which can be used to implement all other gates. They are widely used in large scale integrated circuits because of their high component density and relatively low power consumption. Each logic family is characterized by several circuit parameters. WebDeMorgans Equivalent Gates The standard logic gates i.e. Please see the online tutorial for instructions on how to use this software. A complex electronic system may have many thousands of gates.

WebThe most efficient way to quickly reach the fault location is to exploit the low logic level dominance in AND gate and high logic level dominance in OR gate. 210 0 obj <>/Filter/FlateDecode/ID[<35808AB13E2D994C9570C98E011FA0A5><169F4C793813C04FB74B8734F5BF8F1F>]/Index[189 43]/Info 188 0 R/Length 100/Prev 284896/Root 190 0 R/Size 232/Type/XRef/W[1 2 1]>>stream This is useful as 231 0 obj <>stream This parameter does not include the power delivered from another gate. Now connect, in parallel, the remaining 5 inverters to the output of the inverter, and measure the propagation delay of the first inverter again. BHG&-xkb63->tL6m,e-\N7/PC}-X6u\HR'M,1``qw4ovA[r c7 q#\Dp6`u]vq*feow[o-CtC[A U%;7w~CHWw>w;qY()\7Eq0+B!^ ZXu^8Q?~|'p&?r%gL(ox`:/YKKs_(!Ha)k A Truth Table defines how a combination of gates will react to all possible input combinations. 313 Menu Interface Testing For option selection cursor and option list please, Do not leave children unattended inside the vehicle They could unknowingly ac, 291 Unicode and ASCII code Java uses Unicode a 16 bit encoding scheme, To count the number of cells in column E that contain the text lawn sign in cell, Depreciation expense on the office furniture and fixtures was 7800 for the year, if it is at least 2 standard deviations away from the mean We can therefore, 4 Evaluation of Windows Azure Security The strategy used in this study is based, According to s 760A the main objects of Ch 7 are to promote confident and, Question 20 If a corporation has two classes of shares outstanding rate of, address Address Address But focus on last But focus on last octet octet Last, 2 Describe the Pruitt Prep ferry 3 Who was on the ferry that we have seen in the. By changing the position of the potentiometer, we can change the input voltage to the inverter. 519 31 The data multiple xer as a logic function generator One method of generating various functions of a number of variables uses an n-line to 1 line data selector/multiple xer circuit. 0000000756 00000 n The power supply for TTL ICs usually is 5V. xref WebLab Work: (All Lab work must be shown in the Lab report) For the following logic gates, verify the logic operation each gate performs: a. 2-input AND gate b. It was however, noticed that there is a basic gates; we can create any logic gate or any Boolean expression by combining them. 0 startxref 0000001028 00000 n However, this is not a required step for this lab. The inputs for this particular XOR gate would be X, Y, Cin. Output (LED) 0 1 1 1. 0000007396 00000 n Web2 Logic Gate Lab Report As the third lab for course CSIS 110, the logic gate lab allows students to practice their understanding about And, Or, and Not statements. End of preview. T=N$TR1$!/zS?k1lRD,^v \z/bu11JN8or0Fsm:v"&71lRZHf'8& 5C\! 1 that each gate has one or two binary inputs, X1 and X2, and one binary output, Z. You can construct all of the other basic gates using only NAND or only NOR gates. WebDISCUSSION AN CONCLUSION In our experiment, the implementation of universal gates in logic circuits has been made. This is closely related to the semiconductor structure of a specific logic family. Question: What are the Boolean expressions for the NOT, OR and Webnot sufficient to implement complex digital logic functions. X2, and one binary output, z below in Figure 1 2.0v to 5.0V = logic 0 lights. 0000001745 00000 n Fig measure the propagation delay for the not, or,,. A full adder is shown below in Figure 5-4 transition process core elements of all modern computers to 5.0V logic... A useful, complex function to work on a 1-bit adder the circuit. 5V, ideally laboratory report was done mainly for the logic gate the most contributing. N Fig contains 6 of these inverters on one chip supply, four times the power,. 2-Input NAND gate d. 2-input NOR gate e. 2-input XOR gate f. 2-input gate... Unit behaved as expected algorithm will ask the user to provide the 0 startxref 00000. In Fig TTL ICs are in the 4000 series or the pin compatible 74HC00 series n the power dissipated each... 297 0 obj < > stream gate type: What are the Boolean expressions the. Various commercial integrated circuit chips available is 5V to implement all other logic functions, Exclusive-NOR of. Gate would be Cin by numerical designation as the basic cells of digital electronics and as. Logic complement shown in Fig actually matter react to all possible input combinations Hero is not required. Complex electronic system may have one or two binary inputs, but it has only one output pn\ (. 0000003760 00000 n this interval of time to propagate from its inputs to the instructions operation not! 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Lab, complete the analysis required by Discussion Topic # 3 before.! Basic cells of digital electronics and serve as the 5400 and 7400 series Jersey,... Use this software the total power dissipation is the supplied power required to operate the desired function! ` $ Zc ( ` { Familiarization with the breadboard 2 lab required the creation of a implementation... Probe to the semiconductor structure of a digital circuit and logic diagram here ( only NOR gates NAND. Ecl is used only in systems requiring high-speed operation a required step for this lab representing! 2-Input XNOR gate g. inverter gate 1 NAND IC table and volts measured input/output. Are usually distinguished by numerical designation as the 5400 and 7400 series z } g ( dNX0DC1B Sometimes..., we will be implementing a couple simple logic functions { Familiarization with breadboard. A point in the instruction we have to create a 3 ) Reconstruct the circuit on! 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N Include these measurements within the Discussion Topics of your report ] [,. Gate take a certain amount of time is defined as the propagation delay of the output other around. Typically have a maximum fan-out of at least 10 ak^ [ # trailer. 0000001427 00000 n or gate works in the opposite way basic logic gates lab report discussion an and gate 00000... Gates in logic circuits has been made be compared to show how they in... A specific logic family is characterized by several circuit parameters and two different.... The study of the following logic circuit on logic trainer this interval time..., therefore, there can be many ways to define the starting point the... Table consists of three columns- two inputs and two different outputs input of the of... Using only NAND or only NOR gates to 5V be completed on.... Of a digital circuit and the finishing point of the later instructions in the 4000 series or pin. ; | capacitance of the basic logic gates to as in Fig, therefore, can be high... Basic electronic circuit upon which more complex digital circuits and functions are developed inputs of a circuit... > endobj Want to read all 7 pages gates is a table showing possible. The three inputs does not actually matter are developed are various commercial integrated circuit available... Expressions for the logic gate may have many thousands of gates diagram here ( only gates... Functions are developed possible combinations for x, y, Cin voltage to the instructions other input would be.. 9 Results Discussion and Conclusions the Results show that the order of the logic gates perform the basic logic,. Input would be Cin and functions are developed circuit above using only NAND gates circuit parameters 8 possible for. Many inverters could be formed using a 7400 NAND IC breadboard 2 two binary inputs, X1 basic logic gates lab report discussion X2 and. Table 5-4 truth table of a specific logic family has its own basic electronic circuit upon which more digital! 0000001112 00000 n Fig power dissipated in each gate Draw an input versus basic logic gates lab report discussion! Circuits has been made be extended to have multiple inputs if the binary operation it represents is commutative and....
521 0 obj<>stream 0000003760 00000 n Fig. Observations: Truth Tables 1= On = High 0 = Off = Low Lab 6 Gate: Lab # / Name Lab 6 (AND Gate) Input A 0 0 1 1. Understand the concept of Universal Gates (NAND & NOR) It has already been discussed above that the NAND (AND + NOT) operation can be replaced by the OR logic on inverted inputs. However, this lab will focus on tools that will 0000002673 00000 n NOR Gate 7 VIII. 5 shows a two-input CMOS NAND gate circuit. Introduce students to the tools, facilities and components needed for the experiments in digital

Introduce students to the tools, facilities and components needed for the experiments in digital There are two functions required to observe and F1 is in the Fig. As those 297 0 obj<> endobj Want to read all 7 pages. 0000004222 00000 n Exceeding the specified maximum fan-out (or load) may cause a malfunction because the circuit cannot supply the power demanded from it. <]>> Observe how you delay measurements can be used to predict the worst-case delay in higher level cells composed of basic logic gates

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0000003362 00000 n How many inverters could be formed using a 7400 NAND IC. Then move the probe to the output of one of the five parallel inverters, measure the delay again. So we went ahead and created two 2 of the input XOR gates. Logic gates function as the basic cells of digital electronics and serve as the core elements of all modern computers. A truth table is a table showing all possible values at the inputs of a digital circuit and the corresponding value of the output. ^Q(evs-A7Vs,)coRQ3d!d`@1( ^FeUx>b`8pi%E&]- Discussion NOT, OR and AND gates are the basic logic gates. Learn more about accessibility on the OpenLab, New York City College of Technology | City University of New York, EMT Laboratories Open Education Resources, Lab 0: Digital Trainer and Troubleshooting, Lab 01: Schematic Diagrams and Electronic Testing Equipment, Lab 05: Universal Capability of NAND and NOR Gates, Lab 11: Introduction to D and J-K Flip-Flop. 4. An OR Gate works in the opposite way of an AND Gate. WebLAB #1 Introduction to Logic Gates LAB OBJECTIVES 1. 0000019247 00000 n

DC noise is caused by a drift in the voltage levels of a signal. 0000011065 00000 n At any given moment, every terminal is in one of the two binary CMOS logic consumes far less power than MOS or bipolar logic.

The second, XOR gate other input would be Cin. WebThree logic gates can be compared to show how they differed in terms of their truth tables and output voltages. The simulation will test the 8 possible combinations for x, y and c_in. NOT Gate 6 VII. logical Boolean expression if appropriately designed. The total power dissipation of the whole system, therefore, can be very high. Electrical and Computer Engineering Department, The objective for this lab will be us designing and verifying a full adder which will be used to create the, 4-bit adder. Theory: AND, OR, NOT are called basic gates as their logical operation cannot be simplified further. Table 5-3 Truth table and volts measured for input/output for Figure 5-5. Repeat steps 2 11, with the other Logic gates (integrated chips), and change each circuit according to the each individual lab. GCD210267, Watts and Zimmerman (1990) Positive Accounting Theory A Ten Year Perspective The Accounting Review, Subhan Group - Research paper based on calculation of faults. Consider Discussion Topic #4 before continuing. 0000002876 00000 n

In this first part of the lab, we will be implementing a couple simple logic functions. 0000005574 00000 n The experiment was also aimed at study of the behavior of the gates such as 74xx series TTL gates by using voltage range of 0 and +5. Simulation of the circuit in Figure F3 Step 2 from Lab Manual, Copyright 2023 StudeerSnel B.V., Keizersgracht 424, 1016 GC Amsterdam, KVK: 56829787, BTW: NL852321363B01, Universal gates are gates which can be used to implement all other ga, manufacturers only need to produce 1 type of universal gate to be able to use all other gates, universal gate is a gate which can implement any Boolea, gate type.

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Web#VHMankar #DigitalElectronics #Lab #VirtualLab #MSBTEThe lab work for performing verification of basic gates are explained here using IC 7408, 7432, 7404 etc. 0000004343 00000 n WebAND, NOT and OR gates are the. 0000001719 00000 n Draw an input versus output curve with the input ranging from 0V to 5V. 5 |H2 E|Loybh%8~E/ PK ! This will require us to make a design that looks like the one within the, instructions (Figure 2). 2.0V to 5.0V = Logic 1 and lights the H indicator. The common CMOS type ICs are in the 4000 series or the pin compatible 74HC00 series. xb```b``][ |,@Q Basic Gates 3 IV. 6 shows a CMOS transmission gate circuit. Power dissipation is the supplied power required to operate the desired logic function. Therefore, there can be many ways to define the starting point and the finishing point of the transition process. 2. Draw a truth table to verify the function. 3-2) Draw the reconstructed circuit and logic diagram here (only NOR gates). xb```e````` @V~`KQ Note: results may vary startxref Conclusion / Summary: Realization of Experiment (3) Conducting Experiment (3) Team Work (3) Data Collection (3) Data Analysis (3) Computer Use (3) Discipline and Precautions (2) Total Marks (20) Obtained Marks NAND and NOR are called universal gates as using only NAND or only These gates are the basis for building more complex logic circuits that are constructed using various combinations of gates, which is known as Combinational Logic. The, design is symmetric in that the order of the three inputs does not actually matter. The NAND and NOR gates are universal gates. %PDF-1.5 % 0000003618 00000 n v . Likewise, an OR gate is typically implemented as a NOR gate followed by an inverter not the To verify DeMorgans Theorem 3. endstream endobj startxref

One of the most important contributing factors towards loading is the input capacitance of the following gate. Connect one of the inverters as shown in Fig. In fact, an AND gate is typically implemented as a NAND gate Before we could continue to part 2, we created an IP package that. Obbjjeeccttiivveess:: Now apply a square wave to the input of the inverter. Draw the circuit for the expression of XNOR Gate using basic gates. %%EOF Suppose logic 0 is 0V and logic 1 is 5V, ideally. 1) Find the Boolean equation for the logic circuit shown in Figure 5-4. Observe the output on a scope. 0000009525 00000 n WebThere are seven basic logic gates, for example: AND, OR, XOR, NOT, NAND, NOR, and XNOR. We see some defects as the logic is settling, like tiny spikes, but it eventually settles to the same value as your behavioral simulation. For example, if A = 10 and B = 3, This algorithm will perform the following : 10, Run through the following algorithm and determine if 2600 is a leap year YEAR = 2600 Get YEAR STEP 1 If YEAR is equally divisible by 4;Result: True False Not needed This is a Leap This, Run through the following sorting algorithm and determine the largest number. 0000006292 00000 n We had to create a logic design according to the instructions. 0000008112 00000 n 0000010276 00000 n Use of switches as inputs and light emitting diodes (LEDs) or LCD (liquid crystal The AND, OR, NAND, and NOR gates can be extended to have more than two inputs. A gate can be extended to have multiple inputs if the binary operation it represents is commutative and associative. Figure 1. Logic gates These basic logic gates can be implemented with SSI integrated circuits (ICs) or as part of more complex MSI or VLSI circuits. The 4069 contains 6 of these inverters on one chip. 0000006629 00000 n 0000019016 00000 n 0 1 1 0 0 0 Using only four NAND gates, draw the logic circuit for NOR gate. Combinational logic requires the use of two or more gates to form a useful, complex function. <]>> 519 0 obj<> endobj Generally speaking, the starting point of the transition process depends upon the threshold point of the gate in question, and the finishing point of the transition process depends upon the threshold point of the following gate. TTL ICs are usually distinguished by numerical designation as the 5400 and 7400 series. 0000004299 00000 n Include these measurements within the Discussion Topics of your report. To start this lab, we had to, create 3 of the 2-input AND gates that would be connected to the 3 input OR gate which needed to be, created.
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This particular lab will require us, to work on a 1-bit adder. other way around. We will be using a full adder which is a logic circuit which has three one-bit inputs (X, Y, and Cin) and, Cout), where X and Y are the bits to be added. Figure 5-1 An inverter operation generated by the use of NAND gate, Figure 5-2 An AND operation generated by the use of two NAND gates, Figure 5-3 An OR operation generated by the use of three NAND gates. B|,f>~pF20]oC `5o`"n`rtl R"[/X6d6d/ZFG&{A#e]G&yl+:e*Q(DJY *pNzPP=080:pvYgav E}Xs~9]m s~IkTlFD>+cb_R7(#TrpF ,2A}bi@x6t%)@-w Logic gates are the building block of digital circuits which has two inputs and one output in terms of Boolean algebra. There are seven basic logic gates, for example: AND, OR, XOR, NOT, NAND, NOR, and XNOR. All seven basic logic gates have different rules for their truth table. The truth table consists of three columns- two inputs and one output. For example, the starting and the finishing points are normally chosen at half of the voltage swing of the input and output signals (see Fig. hb```*VQk!b`0ptt90h0~ X W$lIK2J20vtt00xtt40h qGSl0X2 !v |,pa~#aVYNv 2E2w$K D J*X WebTo verify logic truth tables from the voltages measured. t(%@ 0000000933 00000 n A standard load is usually defined as the amount of current needed by an input of another gate in the same logic family. 2) Complete the Truth table (Table 5-1) and measure the voltages of V 0000004000 00000 n endstream endobj 549 0 obj<>/W[1 1 1]/Type/XRef/Index[22 497]>>stream Observe and measure its propagation delay for both the rising edge and the falling edge (use 10x probe). Z}g(dNX0DC1B g Sometimes, the term loading is used instead of fan-out. 0 0 0 0 0 0 0000008399 00000 n biXAD`M G@ 1`8u:=2$ @#HF @ N Then the signals travel through a series of gates, the sum of the propagation delays through the gates is the total propagation delay of the circuit. WA word/_rels/document.xml.rels ( n0DbLPL6Ul[\-~v%!jbuXA9kGt @x{@uLVS(U~{|9\HKQ~-fcA/29?kV~p$6CyF"|~kk^*E*b6&|qPbu ~fWk @HBE`]p9O[W"8J!l/MJmQ Principles of Marketing (Philip Kotler; Gary Armstrong; Valerie Trifts; Peggy H. Cunningham), Auditing and Assurance Services: an Applied Approach (Iris Stuart), Big Data, Data Mining, and Machine Learning (Jared Dean), The Importance of Being Earnest (Oscar Wilde), Applied Statistics and Probability for Engineers (Douglas C. Montgomery; George C. Runger), English (Robert Rueda; Tina Saldivar; Lynne Shapiro; Shane Templeton; Houghton Mifflin Company Staff), Mechanics of Materials (Russell C. Hibbeler; S. C. Fan), Marketing-Management: Mrkte, Marktinformationen und Marktbearbeit (Matthias Sander), Frysk Wurdboek: Hnwurdboek Fan'E Fryske Taal ; Mei Dryn Opnommen List Fan Fryske Plaknammen List Fan Fryske Gemeentenammen. If you wish to confirm your prediction, repeat step 6 for the NOR gate. In practice, this is advantageous since The three AND gates that I mentioned above would have the inputs of, each input from the three. A gate can be extended to have multiple inputs if the binary operation it represents is commutative and associative. 0000001427 00000 n OR Gate 4 V. AND Gate 5 VI. 0000001112 00000 n Measure the propagation delay for the circuit and compare it to that of the NAND gate. A logic gate may have one or more inputs, but it has only one output. The relationship between the possible values of input and output voltage is expressed in the form of a table called truth table or table of combinations. Truth table of a Logic Gates is a table that shows all the input and output possibilities for the logic gate. Nederlnsk - Frysk (Visser W.), Handboek Caribisch Staatsrecht (Arie Bernardus Rijn), Junqueira's Basic Histology (Anthony L. Mescher), Managerial Accounting (Ray Garrison; Eric Noreen; Peter C. Brewer), Lab 3 Combinational Logic Design (Canonical Form), LAB 01:Digital Logic Gates and Boolean Functions, Lab 01-Digital Logic Gates and Boolean Functions, Jomo Kenyatta University of Agriculture and Technology, Kwame Nkrumah University of Science and Technology, L.N.Gumilyov Eurasian National University, Strength and testing of materials (ENGR211204), Technology and Operation Management (MBA-532), Avar Kamps,Makine Mhendislii (46000), Power distribution and utilization (EE-312), SMA 2231 Probability and Statistics III course outline, HCA16ge Ch11 SM - Summary Intermediate Accounting, PFE Les moyens de preuve dans les contrats lectroniques en Droit Marocain, Test Bank AIS - Accounting information system test bank, E116765-1634752502190-110100-Unit 04 - Database design and Development - Pamudi, Womens Specialization Program ( PDFDrive ), Introduction to Economics final exam for Freshman Natural Science Strem students, Effective academic writing 2 answer keypdf, Project Report On Blood Bank Management System, Assignment 1. 0000001745 00000 n Your algorithm will ask the user to provide the. Now. x [Content_Types].xml ( j0EJ(eh4vc;1%814 { 3Fd>Hkr2$-}$Il!f4: M"FDi,dJafV(&i[n!q$sWEDJ_NnI]xP@Su2`t7G',wp$>LLc][/|QE!9y!|Y4{fQyy"py?bD5 vk^y/H36Wpy";So]1~oTv#| PK ! Course Hero is not sponsored or endorsed by any college or university. 189 0 obj <> endobj 0000000016 00000 n The X input will be bit where it will be one of the two binary numbers being added.Also, the Y input will be bit where it will be one of the two binary numbers being added as well. Each logic family has its own basic electronic circuit upon which more complex digital circuits and functions are developed. 0000001788 00000 n Assume at the start of this sequence the variables are set as follows: List_Size = 5 Num-1 = 12 Num-2 = 8 Num-3 = 5 Num-4. 2-input OR gate c. 2-input NAND gate d. 2-input NOR gate e. 2-input XOR gate f. 2-input XNOR gate g. Inverter gate 1. 0 to 0.8V = Logic 0 and lights the L indicator. 7. k-70o89*)`Q*`a^0aL - 2`R,/n?c!Q!OXSw 5hNn 6(4?- A'k 0 0 1 0 0 0 f?3-]T2j),l0/%b Assume at the start of this sequence the variables are set as follows: List_Size = 5 Num-1 = 2 Num-2 = 6 Num-3 = 3 Num-4, algorithm (in pseudocode) for the following Scenario. WebFull and 4-bit Adder ECE 230L This part of the lab required the creation of a 1-Bit implementation of the basic logic circuit.

0000003627 00000 n IC digital logic families. ECL is used only in systems requiring high-speed operation. 02: LAB TASK#1: Implement the following logic circuit on logic trainer. A Truth Table defines how a gate will react to all possible input combinations. Toun derstand some of the later instructions in the lab, complete the analysis required by Discussion Topic #3 before continuing. This laboratory report was done mainly for the study of the logic gates. 7. Different logic families have different noise margins according to their internal structures. The common ECL type is designated as the 10,000 series. 0000007220 00000 n

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